Photomasks as used in semiconductor lithography currently generally consist of a transparent quartz glass plate on which a structured, nontransparent chromium layer is applied (COG: chrome on glass). In the production process, so-called mask blanks are used for this purpose. These are quartz glass plates whose surface is completely covered with a continuous chromium layer which at present is from about 30 to 100 nm thick.
These mask blanks are coated with a photosensitive or electron-sensitive resist and recorded on in a completely targeted manner using any desired layout, for example by means of laser recorders or electron beam recorders. Thereafter, the resist layer is developed and, in the case of the positive resist, the resist is removed in the parts previously recorded on. In the case of a negative resist, on the other hand, the resist is removed in the unexposed parts.
A relief-like image of the previously recorded structure results in the resist. The resist protects the chromium layer in defined parts (the previously exposed or unexposed parts, depending on the resist system), whereas the chromium between these parts is bare and can be further treated in a specific manner.
In mask production, the further treatment comprises targeted removal of the chromium layer by plasma etching. The structure produced beforehand in the resist is transferred here into the chromium layer by removing the bare chromium (not protected by resist) in a reactive ion plasma consisting, for example, of a chlorine/oxygen gas mixture.
The problem here, however, is that large amounts of oxygen have to be employed in the plasma to make it possible to remove sufficient chromium into the gas phase. The chromium must be converted into readily volatile chromium oxides or chromium halogen oxides in order to be capable of being effectively removed finally. However, this large amount of oxygen attacks the resist present on the chromium to a very great extent so that said resist too is gradually removed, in particular laterally. Resist lines present on the chromium are ‘shrunk’, for example by values of about 30 to 60 nm per edge, during the etching. This reduced geometry is also transferred to the chromium layer so that, after the etching process, the faithfulness of the chromium structures to the original (in comparison with the theoretical layout structure) is not ensured. A frequent rule of thumb is that at present there is a loss of about 50 nm (overetching) per structure edge; this means that, after etching, structure lines are invariably about 100 nm narrower than provided for by the theoretical layout.
In the case of the target structure sizes required to date (structure dimensions greater than or equal to 0.25 μm), this etching loss was still tolerable under certain circumstances since the loss of the dimensional stability was corrected in the design itself by a changed recorder layout by recording trenches to be produced 100 nm narrower or lines to be produced 100 nm broader as early as during the structuring of the photoresist layer. By means of this recording reserve, it was possible to compensate the etching loss in advance.
This recording reserve is, however, no longer tolerable in the production of masks having structure dimensions of less than 0.25 μm, in particular from the technology generation for 70 nm structures.
Although the principle of 4 times reduction is still employed, i.e. the structures in the mask may still be four times as large as they are subsequently produced as images on the wafer, in particular the optical proximity correction features (OPC) on the mask which are not be imaged achieve in this case an order of magnitude which can no longer be realized with the mask wafers then available (laser or electron beam recording method). The additional OPC structures will, for example, in the very near future already have dimensions of 100 nm or less and have to be a defined distance away from the main structures on the mask. In the case of these fine structure dimensions, a preceding correction of the layout (structure reserve) is no longer possible since, for example in the case of a required distance of 100 nm and simultaneous required structure reserve of in each case 50 nm per edge, the structures would collapse into a single one in the layout itself. Even if this was still not to be the case for an uncritical distance of, for example, 150 nm, no resist would currently resolve the remaining distance of 50 nm.